Version 4.1 SHEET 1 4292 4404 WIRE 304 544 208 544 WIRE 496 544 384 544 WIRE 528 544 496 544 WIRE 1056 544 528 544 WIRE 1168 544 1056 544 WIRE 1264 544 1168 544 WIRE -688 576 -784 576 WIRE -544 576 -688 576 WIRE 208 576 208 544 WIRE -784 592 -784 576 WIRE 528 672 528 544 WIRE 704 672 528 672 WIRE -784 688 -784 672 WIRE -592 688 -608 688 WIRE -544 688 -544 576 WIRE -544 688 -592 688 WIRE 528 688 528 672 WIRE 1056 704 1056 544 WIRE -608 720 -608 688 WIRE -592 720 -592 688 WIRE 208 720 208 656 WIRE 1168 720 1168 544 WIRE -640 736 -736 736 WIRE -448 752 -576 752 WIRE -192 752 -448 752 WIRE -640 768 -672 768 WIRE -192 768 -352 768 WIRE 80 768 -128 768 WIRE -352 784 -352 768 WIRE -192 784 -224 784 WIRE -224 800 -224 784 WIRE -192 800 -224 800 WIRE 352 800 288 800 WIRE 464 800 464 752 WIRE 464 800 432 800 WIRE 480 800 464 800 WIRE -736 816 -736 736 WIRE -624 816 -624 784 WIRE -624 816 -736 816 WIRE -608 816 -608 784 WIRE -608 816 -624 816 WIRE -592 816 -592 784 WIRE -592 816 -608 816 WIRE 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1024 WIRE -192 1024 -352 1024 WIRE 80 1024 -128 1024 WIRE -192 1040 -224 1040 WIRE 528 1040 528 944 WIRE 592 1040 528 1040 WIRE 720 1040 592 1040 WIRE 832 1040 800 1040 WIRE 976 1040 912 1040 WIRE 1296 1040 976 1040 WIRE 1456 1040 1376 1040 WIRE -352 1056 -352 1024 WIRE -224 1056 -224 1040 WIRE -192 1056 -224 1056 WIRE -624 1072 -624 1040 WIRE -608 1072 -608 1040 WIRE -608 1072 -624 1072 WIRE -592 1072 -592 1040 WIRE -592 1072 -608 1072 WIRE -224 1072 -224 1056 WIRE -192 1072 -224 1072 WIRE -224 1088 -224 1072 WIRE -208 1088 -224 1088 WIRE -176 1088 -176 1072 WIRE -176 1088 -208 1088 WIRE -736 1104 -736 1024 WIRE -608 1104 -608 1072 WIRE -608 1104 -736 1104 WIRE 1056 1104 1056 784 WIRE 1120 1104 1056 1104 WIRE 1168 1104 1168 912 WIRE 1168 1104 1120 1104 WIRE -736 1120 -736 1104 WIRE 528 1168 528 1040 WIRE 656 1168 528 1168 WIRE 736 1168 656 1168 WIRE 832 1168 736 1168 WIRE -352 1200 -352 1136 WIRE -288 1200 -352 1200 WIRE -208 1200 -208 1088 WIRE -208 1200 -288 1200 WIRE 1168 1200 1168 1104 WIRE 1248 1200 1168 1200 WIRE 1392 1200 1312 1200 WIRE 1456 1200 1456 1040 WIRE 1456 1200 1392 1200 WIRE -288 1216 -288 1200 WIRE 528 1232 528 1168 WIRE 1056 1232 1056 1104 WIRE 1168 1232 1168 1200 WIRE 832 1280 832 1168 WIRE 736 1296 736 1168 WIRE 1168 1328 1168 1296 WIRE 368 1344 304 1344 WIRE 464 1344 464 1312 WIRE 464 1344 448 1344 WIRE 480 1344 464 1344 WIRE 656 1360 656 1168 WIRE 304 1376 304 1344 WIRE 528 1376 528 1312 WIRE 480 1392 480 1344 WIRE 832 1392 832 1360 WIRE 304 1488 304 1456 WIRE 480 1488 480 1440 WIRE 480 1488 304 1488 WIRE 528 1488 528 1456 WIRE 528 1488 480 1488 WIRE 608 1488 528 1488 WIRE 656 1488 656 1424 WIRE 656 1488 608 1488 WIRE 736 1488 736 1360 WIRE 736 1488 656 1488 WIRE 832 1488 832 1456 WIRE 832 1488 736 1488 WIRE 1056 1488 1056 1312 WIRE 1056 1488 832 1488 WIRE 1168 1488 1168 1408 WIRE 1168 1488 1056 1488 WIRE 1264 1488 1168 1488 WIRE 608 1552 608 1488 FLAG 208 720 0 FLAG 608 1552 0 FLAG 496 544 V_supply FLAG 1392 1200 Cres FLAG 592 1040 bridge_left FLAG 976 1040 Lres FLAG -736 1120 0 FLAG -784 688 0 FLAG -688 576 5V FLAG -448 752 2 FLAG -448 1008 3 FLAG 464 752 upper_gate FLAG 464 1312 lower_gate FLAG 1120 1104 bridge_right FLAG -1200 992 0 FLAG -912 864 test FLAG -1344 1008 0 FLAG -1264 864 audio FLAG 80 768 4 FLAG 80 1024 5 FLAG -272 928 0 FLAG -288 1216 0 SYMBOL sw 528 912 M180 WINDOW 3 -8 118 Left 2 SYMATTR Value Sw_kw1 SYMATTR InstName S1 SYMBOL sw 528 1472 M180 WINDOW 3 -22 120 Left 2 SYMATTR Value Sw_kw1 SYMATTR InstName S2 SYMBOL bv 288 816 R0 SYMATTR InstName B8 SYMATTR Value V=2*V(4) SYMBOL bv 304 1360 R0 SYMATTR InstName B9 SYMATTR Value V=2*V(5) SYMBOL res 448 784 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 2R2 SYMBOL res 464 1328 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R4 SYMATTR Value 2R2 SYMBOL voltage 208 560 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 WINDOW 3 -82 98 Left 2 SYMATTR InstName V6 SYMATTR Value PULSE(0 48 1u 10u 1 10 20) SYMBOL res 400 528 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R11 SYMATTR Value 1m SYMBOL res 512 672 R0 SYMATTR InstName RS1 SYMATTR Value 1m SYMBOL res 512 1216 R0 SYMATTR InstName RS2 SYMATTR Value 1m SYMBOL res 816 1024 M90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName Rpri_sense SYMATTR Value 1m SYMBOL ind 704 1024 M90 WINDOW 0 5 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName L_res SYMATTR Value 5µ SYMATTR SpiceLine Rser=1m SYMBOL cap 816 1392 R0 SYMATTR InstName C6 SYMATTR Value 100p SYMBOL res 816 1264 R0 SYMATTR InstName R15 SYMATTR Value 1R SYMBOL diode 720 896 R180 WINDOW 0 24 64 Left 2 WINDOW 3 -35 0 Left 2 SYMATTR InstName D3 SYMATTR Value pwr_diode SYMBOL diode 672 1424 R180 WINDOW 0 24 64 Left 2 WINDOW 3 -35 0 Left 2 SYMATTR InstName D5 SYMATTR Value pwr_diode SYMBOL cap 720 1296 R0 WINDOW 0 -27 4 Left 2 SYMATTR InstName C_bridge_1 SYMATTR Value 1f SYMBOL cap 1152 720 R0 SYMATTR InstName C1 SYMATTR Value 470µ SYMBOL cap 1152 1232 R0 SYMATTR InstName C2 SYMATTR Value 470µ SYMBOL res 1040 688 R0 SYMATTR InstName R7 SYMATTR Value 100k SYMBOL res 1040 1216 R0 SYMATTR InstName R8 SYMATTR Value 100k SYMBOL res 1152 816 R0 SYMATTR InstName R10 SYMATTR Value 1m SYMBOL res 1152 1312 R0 SYMATTR InstName R19 SYMATTR Value 1m SYMBOL res 1392 1024 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R_load SYMATTR Value 5R SYMBOL cap 1312 1184 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C_res SYMATTR Value 1.5n SYMBOL Comparators\\LT1719 -608 688 R0 SYMATTR InstName U1 SYMBOL Comparators\\LT1719 -608 944 R0 SYMATTR InstName U2 SYMBOL voltage -784 576 R0 SYMATTR InstName V1 SYMATTR Value 5V SYMBOL SpecialFunctions\\modulate2 -1168 864 R0 WINDOW 3 5 154 Left 2 WINDOW 123 4 194 Left 2 SYMATTR Value mark=1.84E6+2.5E3 SYMATTR Value2 space=1.84E6-2.5E3 SYMATTR InstName A2 SYMBOL voltage -1344 880 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value SINE(0.5 0.49 750) SYMBOL bv -352 768 R0 WINDOW 3 -104 102 Left 2 SYMATTR Value V=delay(V(2), 15ns) SYMATTR InstName B1 SYMBOL bv -352 1040 R0 WINDOW 3 -110 123 Left 2 SYMATTR Value V=delay(V(3), 15ns) SYMATTR InstName B2 SYMBOL Digital\\and -160 720 R0 WINDOW 3 -96 17 Left 2 SYMATTR Value Vhigh=5 SYMATTR InstName A1 SYMBOL Digital\\and -160 976 R0 WINDOW 3 -104 7 Left 2 SYMATTR Value Vhigh=5 SYMATTR InstName A3 TEXT -1432 1392 Left 2 !.model pwr_diode D(Ron=1m Roff=1Meg Vfwd=.4) TEXT -1320 1352 Left 2 !.tran 0 40m 10u 10n TEXT -1432 1456 Left 2 !.model Sw_kw1 SW(Ron=.01 Roff=100Meg Vt=4 Vh=-1) TEXT -1464 -72 Left 2 ;class D power amp FM, 1.84Mhz\n \nI want this to be narrowband FM rather thn wideband FM.\nnarrowband FM is defined as peak deviation is less than max audio freq.\namateurs often set max audio freq = about 3khz, so I will set peak deviation = 2.5khz.\nif the peak deviation was greater than the 3khz max audio freq , then this would be called wideband FM.\n \nIn the control circuit, the comparators on the left generate pulses that drive the high and low FETs.\nthere is then a circuit block that cuts 15ns off these pulses.\nthis is to ensure that both FETs are not on at once, this would generate a very high current that could \ngenerate EMI and even destroy the FETs.\n \nThe power circuit FETs are implemented as ideal switches S1 and S2 here,\nas complex circuits can have simulation issues\nthis circuit is open loop, that is it doesn't feed the output voltage back to the control circuit.\nthe power circuit components L_res and C_res have been selected to resonate at the 1.84 Mhz that the circuit is driven at. TEXT 528 448 Left 4 ;Class D amplifier power circuit TEXT 440 -136 Left 4 ;Instructions TEXT -1456 -416 Left 5 ;Class D power Amp, set up as an FM amplifier. TEXT -816 440 Left 4 ;Class D amplifier control circuit. TEXT -376 560 Left 2 ;this circuit block is to \nshorten the drive pulses \nto stop "shoothrough"\nwhen both power switches \nare on at once. TEXT 448 -80 Left 2 ;click on run\nthen click on "4" to plot it, then click on "5" to plot it.\nzoom in so that you can see the individual pulses.\nthen click on the plot window then on plot settings / add plot pane\nthen click on "bridge_left" to plot it, then click on "bridge_right" to plot it.\nthen click on the plot window and plot settings/add plot pane\nthen click on "R_load" to plot its current,\nthen click on the plot window and plot settings/add plot pane\nthen hold the ALT key hover over R-Load and click, \nthis will plot the power dissipated in it.\nclick on the plot window, then hold the cntrl key and click on the "V(Cres,Lres)*I(R_load)" title\nthis will bring up its average value (about 100W).\nallow nthe simulation to finish,\nclick on the plot window, then on view/FFT,\nin the window that opens click on I(R_load).\nin the graph that opens zoom to the 1.84 Mhz peak. TEXT -1448 -168 Left 4 ;Circuit description. TEXT -1448 -360 Left 3 ;The power circuit components L_res and C_res have been selected to resonate at the 1.84 Mhz that the circuit is driven at.\nHence this circuit is only designed for one band.\nfor a different band you would want different values of L_res and C_res, in fact you would want a complete new circuit to avoid the \nparasitics associated with switches. TEXT -1312 440 Left 4 ;FM signal source TEXT -1392 528 Left 3 ;Could be replaced with\neg a frequency modulated\nColpits oscillator. RECTANGLE Normal 0 1280 -432 544 2 RECTANGLE Normal 48 1296 -864 480 2 RECTANGLE Normal 1488 1584 144 480 2 RECTANGLE Normal -896 1296 -1456 480 2